The rapid size reduction of CMOS technologies is limiting the maximum power supply voltage that integrated circuits (IC) can sustain, and this trend  will continue. In a digital IC, as devices dimensions shrink, more and more devices can be fabricated on the same die, the parasitic capacitances also tend to decrease, and current density increases. The combined effect is a reduction of the propagation delay, which allows higher throughput and clock rates for digital circuits. The performance of digital circuits improves with the size reduction of the technology. Unfortunately, from a general point of view, technology scaling has a negative impact on the performance of analog integrated circuits. Therefore, scaling degrades the intrinsic gain of the devices and, what is even more critical, the very limited voltage room available reduces the circuit dynamic range (DR) with respect to the DR counterparts for higher supply voltages. Therefore, in such low supply voltage (LV) conditions, analog circuits require larger input/output voltage signal swings, enhanced linearity, and larger rejection to undesired signals, to keep a similar performance with respect to the operation at higher supply voltages. Many analog design issues, which were unimportant only a decade ago, are now of vital importance and new circuit topologies and design strategies must be investigated for supply voltages in the order of one MOS transistor threshold voltage . In this papers, the type and control of the common-mode (CM) component of (differential) signals in LV analog signal processors, is presented. Traditionally, common-mode feedback (CMFB) techniques have been applied for the control of the output CM component in (FD) circuits. However, most of the conventional techniques are not valid for very LV applications and hence, alternative solutions are needed. The merging of common-mode feedforward and common-mode feedback techniques to enhance circuit performance will be introduced.
II COMMON-MODE FEEDBACK PRINCIPLES
One of the most useful building blocks in analog signal processors is the operational amplifier (Op Amp) or operational transconductance amplifier (OTA). For small size technologies the power supply is limited, but the output signal swing still needs to be large. One solution to increase the output signal is to use fully differential amplifiers. That is both differential input and differential output. Fig. 1 illustrates the conceptual architecture of the use of common-mode feedback. The basic idea is to first monitor the common-mode signal (that is the sum of the output signals) and then compare the common mode signal with a reference voltage, which usually is 0 volts. Thus a correction signal is generated and applied to the fully differential amplifier, such that eventually the correction signal becomes near to zero. The correction signal is the difference between the common-mode signal and the reference voltage. Fig. 2 illustrates an actual implementation of the conceptual architecture of Fig. 1. Fig. 2(a) and (b) illustrate the block and transistor level representation. The two stage differential amplifier has its two outputs connected to two simple differential amplifiers (M21-M24). The outputs of the simple amplifiers are added (in M25) and the corresponding output current is applied to the tail current (M5). The sensing of the output signals can be done in voltage as shown before, but it can be carried out in current. This principle is illustrated in Fig. 3. The amplifier is a transconductance amplifier. This transconductance amplifier consists of a differential pair and two current-mirrors. The common-mode level sensing circuit is applied to the sense amplifier where is compared with a reference current. The output of this CM sense amplifier is then injected to output bias current of the FD amplifier.
The use of common-mode feedback has as objective to: i) cancel the common-mode output signals; ii) fix the DC operating point at the output that maximizes the differential voltage gain. In addition the use of common-mode feedback should reduce the output noise. The actual implementation of the common-mode feedback is not trivial. Several design issues need to be taken into consideration to provide an implementation with the desired specifications and performance. Among them we need to minimize the loading effects of the amplifier when is connected to the sensing amplifier. Stability of the amplifier with feedback must be well defined. Another even more critical issue is the bandwidth of the loops associated with the differential-mode and the common-mode loops. These loop bandwidths should be of the same order to yield a good commonmode rejection ratio in the frequency range of interest. The DC gain of the CMFB loop must be large enough to keep an accurate control the CM component. If not, an asymmetrical swing occurs which entails a loss in the DR. The gain-bandwidth product of the CMFB loop (LGBWCM) should be at least equal to the gain-bandwidth product of the DM loop (LGBWDM) counterpart. We can consider common-mode feedback at the input and output port. Thus if LGBWCM,o < LGBWDM, the system does not perform as a fully-balanced systems in the range of frequencies comprised between LGBWCM,o and LGBWDM; while if LGBWCM,i < LGBWDM occurs, the amplifier does not operate properly since the input CM voltage can be out of the amplifier input CMR in the frequency band comprised between LGBWCM,i and LGBWDM. The CMFB loop must only act over CM voltage signal, while does not affect to any DM voltage signal. If this not occurs, harmonic distortion by the CMFB loop is induced in the signal.
III COMMON-MODE-FEEDFORWARD TECHNIQUES
The use of common-mode Feedforward (CMFF) is very desirable; however note that using only CMFF is not sufficient. CMFF can help to reduce drastically the output common-mode signals, but it cannot help to stabilize the DC output operating bias. The conceptual representation of the CMFF is shown in Fig. 4(a). In the case of multiple cascade amplifiers we can make clever use of CMFF as shown in Fig. 4(b). Note that the common-mode feedforward detector is part of the amplifier; also note that the detection is not done in the amplifier itself but in the next one in the cascade stages. Then a simple feedback is implemented from say amplifier 2 to amplifier 1. One potential transistor level implementation  is shown in Fig. 5. Observe in this figure the symmetry and balance of the topology that yields optimal performance as shown later.
IV AN EXAMPLE OF CMFB AND CMFF TECHNIQUES
In this example we show the effect of the CMRR for three different cases. That is a) CMFF only, b) CMFB only, c) CMFB + CMFF. Fig. 6 shows how the combination of the two common-mode techniques yields around 80 dB. Furthermore, the linearity of the amplifier is improved by using both common-mode techniques. Fig. 7 shows that we can obtain up 1.2 peak to peak differential input with less than 1% THD for a 3.3V power supply.
A brief introduction to common-mode feedback concepts has been introduced. The key issue in this paper is the strategic use of jointly of the common-mode feedforward and common-mode feedback yielding optimal results for common-mode rejection ratio as well as an improved linearity. More details about LV amplifiers common-mode feedback techniques are available elsewhere.